In a phase current detection device that is used for a conventional three-phase PWM inverter apparatus, the control cycle Tsw changes to be longer or shorter in accordance with a phase command value θ* and a voltage command value V*. For example, if a holding time (t1 or t2) of the switching mode, corresponding to a basic voltage vector (other than a 0 vector), which is determined in accordance with the phase command value θ* and the voltage command value V*, is longer than the sum of a dead time tdd of an inverter main circuit and a time tsw required for current detection by a Hall CT 9, that is, (tdd+tsw), a predetermined short control cycle Tsw is selected. If the holding time of the switching mode is shorter than the time (tdd+tsw), on the other hand, the control cycle Tsw is set to be long, so that the holding time becomes longer than the time (tdd+tsw) (e.g. see PTL 1).